921f8b0579
1. Do the same mask trick as with AVX2. 2. Get rid of load, generate constant on the fly. ``` name old time/op new time/op delta Sum/AVXInline_digest-8 2.26ms ± 4% 2.17ms ± 5% -4.05% (p=0.000 n=19+17) name old speed new speed delta Sum/AVXInline_digest-8 44.3MB/s ± 4% 46.2MB/s ± 5% +4.25% (p=0.000 n=19+17) ``` Signed-off-by: Evgenii Stratonikov <evgeniy@nspcc.ru>
107 lines
2.6 KiB
ArmAsm
107 lines
2.6 KiB
ArmAsm
#include "textflag.h"
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// mul2 multiplicates FROM by 2, stores result in R1
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// and uses R1, R2 and R3 for internal computations.
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#define mul2(FROM, TO, R2, R3) \
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VPSLLQ $1, FROM, TO \
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VPALIGNR $8, TO, FROM, R2 \
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VPSRLQ $63, R2, R2 \
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VANDPD TO, X14, R3 \
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VPUNPCKHQDQ R3, R3, R3 \
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VXORPD R2, TO, TO \
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VXORPD R3, TO, TO
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#define mask(bit, tmp, to) \
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VPSRLW bit, X10, tmp \
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VPAND X12, tmp, to \ // to = 0x000<bit>000<bit>...
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VPSUBW to, X13, to // to = 0xFFFF.. or 0x0000 depending on bit
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#define mulBit(bit) \
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VMOVDQU X0, X8 \
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VMOVDQU X2, X9 \
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mul2(X0, X5, X6, X7) \
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VXORPD X1, X5, X0 \
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mul2(X2, X5, X6, X7) \
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VXORPD X3, X5, X2 \
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mask(bit, X6, X5) \
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VANDPD X0, X5, X1 \
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VXORPD X8, X1, X1 \
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VANDPD X2, X5, X3 \
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VXORPD X9, X3, X3
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// func mulBitRight(c00, c01, c10, c11, e *[2]uint64)
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TEXT ·mulBitRight(SB),NOSPLIT,$0
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MOVQ c00+0(FP), AX
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VMOVDQU (AX), X0
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VMOVDQU X0, X8 // remember c00 value
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MOVQ c01+8(FP), BX
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VMOVDQU (BX), X1
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MOVQ c10+16(FP), CX
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VMOVDQU (CX), X2
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VMOVDQU X2, X9 // remember c10 value
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MOVQ c11+24(FP), DX
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VMOVDQU (DX), X3
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VPXOR X13, X13, X13 // Y13 = 0x0000...
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VPCMPEQB X14, X14, X14 // Y14 = 0xFFFF...
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VPSUBQ X14, X13, X13
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VPSLLQ $63, X13, X14
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mul2(X0, X5, X6, X7) // c00 *= 2
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VXORPD X5, X1, X0 // c00 += c01
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mul2(X2, X5, X6, X7) // c10 *= 2
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VXORPD X3, X5, X2 // c10 += c11
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MOVQ e+32(FP), CX
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VMOVDQU (CX), X5
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VANDPD X0, X5, X1 // c01 = c00 + e
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VXORPD X8, X1, X1 // c01 += X8 (old c00)
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VANDPD X2, X5, X3 // c11 = c10 + e
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VXORPD X9, X3, X3 // c11 += x9 (old c10)
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VMOVDQU X0, (AX)
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MOVQ c10+16(FP), CX
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VMOVDQU X2, (CX)
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VMOVDQU X1, (BX)
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VMOVDQU X3, (DX)
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RET
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TEXT ·mulByteRight(SB),NOSPLIT,$0
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MOVQ c00+0(FP), AX
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VMOVDQU (AX), X0
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MOVQ c01+8(FP), BX
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VMOVDQU (BX), X1
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MOVQ c10+16(FP), CX
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VMOVDQU (CX), X2
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MOVQ c11+24(FP), DX
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VMOVDQU (DX), X3
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MOVQ $0, CX
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MOVB b+32(FP), CX
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VPXOR X13, X13, X13 // X13 = 0x0000...
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VPCMPEQB X14, X14, X14 // X14 = 0xFFFF...
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VPSUBQ X14, X13, X10
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VPSUBW X14, X13, X12 // X12 = 0x00010001... (packed words of 1)
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VPSLLQ $63, X10, X14 // X14 = 0x10000000... (packed quad-words with HSB set)
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MOVQ CX, X10
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VPSHUFLW $0, X10, X11
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VPSHUFD $0, X11, X10
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mulBit($7)
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mulBit($6)
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mulBit($5)
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mulBit($4)
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mulBit($3)
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mulBit($2)
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mulBit($1)
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mulBit($0)
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VMOVDQU X0, (AX)
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MOVQ c10+16(FP), CX
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VMOVDQU X2, (CX)
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VMOVDQU X1, (BX)
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MOVQ c11+24(FP), DX
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VMOVDQU X3, (DX)
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RET
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