forked from TrueCloudLab/tzhash
127 lines
2.7 KiB
ArmAsm
127 lines
2.7 KiB
ArmAsm
#include "textflag.h"
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// mul2 multiplicates FROM by 2, stores result in R1
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// and uses R1, R2 and R3 for internal computations.
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#define mul2(FROM, TO, R2, R3) \
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VPSLLQ $1, FROM, TO \
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VPALIGNR $8, TO, FROM, R2 \
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PSRLQ $63, R2 \
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MOVUPD ·x127x63(SB), R3 \
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ANDPD TO, R3 \
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VPUNPCKHQDQ R3, R3, R3 \
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XORPD R2, TO \
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XORPD R3, TO
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#define mask(bit, src, tmp, to1, to2) \
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MOVQ src, tmp \
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SHRQ bit, tmp \
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ANDQ $1, tmp \
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NEGQ tmp \
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MOVQ tmp, to1 \
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VPBROADCASTB to1, to2
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// FIXME VPBROADCASTB is AVX2 instruction
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//https://software.intel.com/en-us/forums/intel-isa-extensions/topic/301461
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#define mulBit(bit) \
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MOVUPD X0, X8 \
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MOVUPD X2, X9 \
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mul2(X0, X5, X6, X7) \
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VXORPD X1, X5, X0 \
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mul2(X2, X5, X6, X7) \
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VXORPD X3, X5, X2 \
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mask(bit, CX, DX, X6, X5) \
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VANDPD X0, X5, X1 \
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XORPD X8, X1 \
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VANDPD X2, X5, X3 \
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XORPD X9, X3
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// func mulBitRight(c00, c01, c10, c11 *[2]uint64, byte)
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TEXT ·mulByteRight(SB),NOSPLIT,$0
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MOVQ c00+0(FP), AX
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MOVUPD (AX), X0
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MOVQ c01+8(FP), BX
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MOVUPD (BX), X1
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MOVQ c10+16(FP), CX
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MOVUPD (CX), X2
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MOVQ c11+24(FP), DX
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MOVUPD (DX), X3
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MOVB e+32(FP), CX
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mulBit($7)
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mulBit($6)
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mulBit($5)
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mulBit($4)
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mulBit($3)
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mulBit($2)
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mulBit($1)
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mulBit($0)
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MOVUPD X0, (AX)
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MOVQ c10+16(FP), CX
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MOVUPD X2, (CX)
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MOVUPD X1, (BX)
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MOVQ c11+24(FP), DX
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MOVUPD X3, (DX)
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RET
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// func mulBitRight(c00, c01, c10, c11, e *[2]uint64)
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TEXT ·mulBitRight(SB),NOSPLIT,$0
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MOVQ c00+0(FP), AX
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MOVUPD (AX), X0
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MOVUPD X0, X8 // remember c00 value
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MOVQ c01+8(FP), BX
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MOVUPD (BX), X1
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MOVQ c10+16(FP), CX
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MOVUPD (CX), X2
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MOVUPD X2, X9 // remember c10 value
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MOVQ c11+24(FP), DX
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MOVUPD (DX), X3
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mul2(X0, X5, X6, X7)
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VXORPD X1, X5, X0
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mul2(X2, X5, X6, X7)
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VXORPD X3, X5, X2
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MOVQ e+32(FP), CX
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MOVUPD (CX), X5
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VANDPD X0, X5, X1
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XORPD X8, X1
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VANDPD X2, X5, X3
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XORPD X9, X3
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MOVUPD X0, (AX)
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MOVQ c10+16(FP), CX
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MOVUPD X2, (CX)
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MOVUPD X1, (BX)
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MOVUPD X3, (DX)
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RET
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// func mulBitRightx2(c00c10, c01c11 *[4]uint64, e *[2]uint64)
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TEXT ·mulBitRightx2(SB),NOSPLIT,$0
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MOVQ c00c10+0(FP), AX
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VMOVDQA (AX), Y0
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MOVQ c01c11+8(FP), BX
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VMOVDQA (BX), Y8
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ e+16(FP), CX
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VBROADCASTI128 (CX), Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y8, (BX)
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VMOVDQA Y3, (AX)
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RET
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