forked from TrueCloudLab/tzhash
c68e38b943
Right now AVX2 implementation looses to C binding in speed. This is probably, because of 2 things: 1. Go does not inline `mulBitRightx2` in loop iteration. 2. `minmax` is loaded every time from memory. In this PR: 1. Unroll `mulBitRightx2` manually and use `mulByteRightx2` instead. 2. Generate `minmax` in place without `LOAD/LEA` instructions.
186 lines
3.3 KiB
ArmAsm
186 lines
3.3 KiB
ArmAsm
#include "textflag.h"
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// func mulByteRightx2(c00c10, c01c11 *[4]uint64, b byte)
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TEXT ·mulByteRightx2(SB),NOSPLIT,$0
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MOVQ c00c10+0(FP), AX
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VMOVDQA (AX), Y0
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MOVQ c01c11+8(FP), BX
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VMOVDQA (BX), Y8
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MOVB b+16(FP), CX
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// 1 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $7, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 2 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $6, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 3 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $5, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 4 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $4, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 5 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $3, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 6 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $2, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 7 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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SHRQ $1, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y3, Y0
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// 8 bit
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VPSLLQ $1, Y0, Y1
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VPALIGNR $8, Y1, Y0, Y2
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VPSRLQ $63, Y2, Y2
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VPXOR Y1, Y2, Y2
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VPSRLQ $63, Y1, Y3
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VPSLLQ $63, Y3, Y3
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VPUNPCKHQDQ Y3, Y3, Y3
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VPXOR Y2, Y3, Y3
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MOVQ CX, DX
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ANDQ $1, DX
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NEGQ DX
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MOVQ DX, X1
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VPBROADCASTB X1, Y2
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VPXOR Y3, Y8, Y3
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VPAND Y3, Y2, Y4
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VPXOR Y4, Y0, Y8
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VMOVDQA Y8, (BX)
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VMOVDQA Y3, (AX)
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RET
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